Since this value depends on the present state and the value of the input signals, the next state table will contain one column for each assignment of binary values to the input signals. These are present states as shown in the table.įor the next state part of the table, each entry defines the value of the sequential circuit in the next clock cycle after the rising edge of the Clk. Since we have two flip-flops, the number of possible states is four - that is, Q1Q0 can be equal to 00, 01, 10, or 11. STEP 3: Now convert these next-state equations into tabular form called the next-state table.Įach row is corresponding to a state of the sequential circuit and each column represents one set of input values. Therefore the next state equal the excitation equations. In the case of D flip-flops, Q(next) = D. STEP 2: Derive the next-state equations by converting these excitation equations into flip-flop characteristic equations. These Boolean expressions are called excitation equations since they represent the inputs to the flip-flops of the sequential circuit in the next clock cycle. Since there are two D flip-flops in this example, we derive two expressions for D1 and D0: STEP 1: First we derive the Boolean expressions for the inputs of each flip-flops in the schematic, in terms of external input Cnt and the flip-flop outputs Q1 and Q0. Gajski, Principles of Digital Design, Prentice Hall, 1997, p.230.ĭerive the state table and state diagram for the sequential circuit shown in Figure 7.įigure 7. When we reach this stage, we use either the table or the state diagram to develop a timing diagram which can be verified through simulation. The output equations can be derived from the schematic, and once we have our output and next-state equations, we can generate the next-state and output tables as well as state diagrams. Then, to obtain next-state equations, we insert the excitation equations into the characteristic equations. We start with the logic schematic from which we can derive excitation equations for each flip-flop input. Analysis procedure of sequential circuits. The suggested analysis procedure of a sequential circuit is set out in Figure 6 below.įigure 6. Both the output and the next state are a function of the inputs and the present state. The behaviour of a sequential circuit is determined from the inputs, the outputs and the states of its flip-flops.
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